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Public repository / NoNormalCreeper

TecPlusRV-Insight

面向 TEC-PLUS 平台 RISC-V SoC 设计与实现,可运行 FreeRTOS、gdb 调试与简单的指令扩展,能跑 Bad Apple。我们的北邮 2026 年“项目式课程阶段二”代码仓库。

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7Open issues
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Language distribution

Share of source bytes reported by GitHub

Verilog54%
C17%
Python14%
Shell12%
Makefile2%
Assembly1%
Linker Script<1%
SystemVerilog<1%
Filebench WML<1%

Recent activity

Latest commits on the default branch

docs: Add copyright in READMENoNormalCreeper · Sep 1, 2026Create LICENSENoNormalCreeper · Sep 1, 2026Add postcard section to READMENoNormalCreeper · Sep 1, 2026Revise README for TecPlusRV Insight projectNoNormalCreeper · Jul 16, 2026docs: Add development diary and update project documentationNoNormalCreeper · Jul 16, 2026docs: 添加实验报告NoNormalCreeper · Jul 14, 2026Add course documentation for computer system design project and update GDB demo with debug break

Project details

Created Jul 2026 Updated Sep 2026 Apache License 2.0

Contributors

4
NoNormalCreeper's avatarNoNormalCreeper141 commitsLiophis's avatarLiophis16 commitsMikhailTukhachevsky's avatarMikhailTukhachevsky15 commitslll-678's avatarlll-67811 commits
NoNormalCreeper · Jul 14, 2026
fix: add comment to clarify breakpoint assembly instructionNoNormalCreeper · Jul 13, 2026
feat: 默认链接 DOT4 firmware 接口NoNormalCreeper · Jul 13, 2026
merge: 整合 DarkRISCV DOT4 加速扩展NoNormalCreeper · Jul 13, 2026