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Public repository / VLSIDA

OpenRAM

An open-source static random access memory (SRAM) compiler.

1.2KStars

291Forks

71Open issues

57Subscribers

Language distribution

Share of source bytes reported by GitHub

Python92%

HCL3%

Assembly3%

Makefile1%

Verilog1%

C<1%

Dockerfile<1%

TeX<1%

Shell<1%

Nix<1%

Tcl<1%

CSS<1%

Recent activity

Latest commits on the default branch

Merge pull request #304 from ThVerg/fix-sky130-narrow-nfet-modeljcirimel · Aug 16, 2026 Merge pull request #305 from ThVerg/fix-nix-develop-flake-pathjcirimel · Aug 13, 2026 Fix nix develop invocation for verification scriptsfanisvergos-art · Aug 11, 2026 sky130: use special_nfet_01v8 model for sub-0.42um nfetsfanisvergos-art · Aug 11, 2026 change spare cols routing from channel to normal routing to avoid short circuitsjcirimel · Jun 24, 2026 fix naming for spare colsjcirimel · Jun 24, 2026 make sky130-install now correctly merges with privded cellsjcirimel · May 5, 2026

Project details

Created Nov 2016 Updated Oct 2026 BSD 3-Clause "New" or "Revised" License Project website

gdsmagicnetgennetlistsngspicepythonsram

Contributors

8

mguthaus2707 commits

hznichol393 commits

jcirimel337 commits

erendn275 commits

samuelkcrow210 commits

use python venv so we can still run make libraryjcirimel · May 4, 2026

use python venv with nixjcirimel · May 4, 2026

fix ciel repojcirimel · May 4, 2026

bugraonal

190 commits

mtgrimes131 commits

vlsida-bot47 commits