Damien Pretet

Parametric AXI4 crossbar in SystemVerilog

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Repository gathering basic modules for CDC purpose

A Vim plugin that converts ANSI-colored log files into readable, highlighted text by hiding escape sequences and preserving their foreground colors.

Zsh, Vim & Tmux dotfiles

Multi-port BRAM IP for ASIC and FPGA